Code-Level Implementation of High Speed Synchronized Data Transmission Technique for Faster Data Transmission

Authors

  • C. S. Jyothilakshmi Department of Electronics and Communication Engineering, Sree Narayana Guru College of Engineering and Technology, Korom, India
  • Sanjay P. Nambiar Technical Engineer, IKK Group of Companies, India

Keywords:

USART, UART, Synchronized, Asynchronized

Abstract

It is observed that in the current times the Embedded systems have suddenly achieved more importance and complexity. A large variety of systems are now being designed using Field Programmable Gate Array (FPGA). This happens because of its salient features like size, flexibility, and easy availability of resources. In this paper the design and implementation of a high-speed data transmission protocol with the help of POWER-PC is being implemented. This serial communication protocol is implemented in synchronized mode taking all the advantages of asynchronous as well as synchronous transmissions. The paper implements both synchronous as well as asynchronous modes of data transfers.

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Published

05-04-2022

How to Cite

[1]
C. S. Jyothilakshmi and S. P. Nambiar, “Code-Level Implementation of High Speed Synchronized Data Transmission Technique for Faster Data Transmission”, IJRESM, vol. 5, no. 3, pp. 169–172, Apr. 2022.

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Section

Articles